The Workshop

INA-OCMC is a network oriented workshop presenting original work in the field of on-chip, multi-chip interconnection network architecture. The workshop aims at bringing together researchers and engineers from industry and academia to share ideas and thoughts about networking of devices in both the off-chip and the on-chip environment, each with its own design constraints. This is the ninth edition of the workshop. In the previous editions the workshop exhibited a competent audience and interesting discussions arose from the different presentations of authors and from the keynote, thus promoting joint research initiatives.
Call for Papers

Technical Scope

Scalable interconnect architectures form the fabric that unifies future complex computing platforms. The interconnect architecture should be as high performance as the compute nodes, thus enabling the expected exponential growth in system concurrency. The number of nodes either on-chip or off-chip that need to communicate in modern embedded and HPC systems is constantly increasing. This trend poses significant challenges to the interconnection network designers that tackle a multidimensional problem involving hardware and software components such as network interfaces, switches, and communication library APIs. The INA-OCMC workshop focuses on the presentation of novel interconnect architectures, optical and electrical, for embedded MPSoCs/CMPs, Cloud/Datacenter, microservers and HPC systems.

To emphasize both the fundamental impact of silicon photonic technologies on future system and interconnection network architectures and, conversely, the driving forces of practical and economically viable system-level design, requirements and constraints on the underlying technologies, this year the INA-OCMC and SiPhotonics Workshop will be held in a federated fashion. We plan to organize joint keynote presentations and a panel discussion with experts from both fields on topics of interest to both communities. This way, we intend to foster the exchange of ideas and increase collaboration between these highly complementary workshops. The paper submission and review processes will, however, still be run independently by each workshop.

We invite contributions of previously unpublished results on all aspects of emerging interconnect architectures, including but notlimited to:

  • Networks-on-Chip (NoC)

  • Multi-Chip Interconnection Networks, including Cluster Interconnects

  • Communication architectures for 2,5 D and 3D stacked systems

  • Asynchronous interconnect designs

  • Switching, buffering, and routing architectures

  • Interaction with memory hierarchy

  • Architectures for QoS support

  • Flow control and congestion management in switching fabrics

  • Virtualization, SDN, OpenFlow, NFV

  • Topology exploration

  • Impact of the interconnect on application performance

  • Reliability, availability, fault tolerance

  • Reconfigurable/Programmable interconnect components

  • Programming models for communication-centric systems


Workshop Program

8.45-9.45         HiPEAC Keynote (Room ForumZaal)

10.00-13.00     INA-OCMC Morning Session (Room E107)

                            10.00-10.10 Opening INA-OCMC'15

                            Session 1: Power-Efficient Optical NoCs
                            (Session Chair: José Flich, University of Valencia)

                            10.10-10.35  (1) Towards High-Performance and Power-Efficient
                                                        Optical NoCs Using Silicon-in-Silica Photonic

                                                        Elena Kakoulli, Vassos Soteriou, Charalambos
                                                        Koutsides and Kyriacos Kalli.
                                                        Cyprus University of Technology, (Cyprus).
                            10.35-11.00  (2) Contrasting Power Efficiency of Contention
                                                        Resolution vs Avoidance Strategies in
                                                        Optical Ring Interconnects for
                                                        Photonically-Integrated Embedded Systems.

                                                        Luca Ramini, Mahdi Tala and Davide Bertozzi.
                                                        University of Ferrara, (Italy)

                            11.00-11.20 Coffee Break

                            11.20-11.50 Invited Talk
                                                    Enrique Vallejo, (University of Cantabria)
                                                    "Low-cost Deadlock Avoidance
                                                    in Direct Interconnection Networks"

                            11:50-12:50 Keynote
                                                   William Dally, (Nvidia/Stanford University)
                                                    "Trends in Networking"

13.00-14.00       Lunch

14.00-15.00      HiPEAC Keynote (Room ForumZaal)

15.30-17.00      INA-OCMC Afternoon Session (Room E107)

                            Session 2: Integrating Security into Application-Specific NoCs,
                                           Parallel Algorithms for 3D NoCs, and
                                           Multicore Programmability.

                            (Session Chair: Luca Ramini, University of Ferrara)

                            15.30-15.55  (1) Automatic ILP-based Firewall Insertion for Secure
                                                        Application Specific Networks-on-Chip.

                                                        Yong Hu(a), Daniel Mueller-Gritschneder(a),
                                                        Martha Johanna Sepulveda(b), Guy Gogniat(c)
                                                        and Ulf Schlichtmann(a).
                                                        (a)TUM Munich (Germany), (b)University of Sau
                                                        Paulo(Brasil),(c)University of South
                                                        Brittany (France).
                            15.55-16.20 (2) A Parallel Gauss-Seidel Algorithm on a 3D Torus
                                                        Network-on-Chip Architecture.

                                                        Khaled Day(a) and Mohammad Al-Towaiq(b).
                                                        (a)Sultan Qaboos University (Oman), (b)Jordan
                                                        University of Science and Technology
                            16.20-16.45 (3) A Co-Design Approach for Hardware Optimizations
                                                        in Multicore Architectures using MCAPI.

                                                        Thiago Raupp, Romain Lemaire and Fabien
                                                        CEA-Leti (France).

16.50-17.00        Closing INA-OCMC 2015


Workshop Organizers

General Chair

Program Chairs

Steering Committee

Publication Chair

Web Chair


Paper submission

Submitted papers must represent original, previously unpublished, research that is not currently under review for any other workshop, conference or journal. All manuscripts will be reviewed by an international Program Committee and will be judged on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the workshop attendees. The submission and review process will be handled electronically via EasyChair:

Papers must be in PDF format and should include title, authors and affiliations as well as the e-mail address of the contact author. Papers must be formatted in accordance to the double-column CPS format. For formatting templates and information please visit Submissions must be limited to 4 pages, including figures and references. Papers deviating significantly from the paper size and formatting rules may be rejected without review.



The proceedings of the workshop will be published by Conference Publishing Services (CPS). Conference proceedings will be submitted for indexing and inclusion in Xplore and CSDL.
Content will be submitted to the indexing companies for possible indexing. Indexing services are independent organizations, and we cannot guarantee that any particular abstract or index entry will be included in Ei Compendex or any other indexing service.



Authors of accepted papers are expected to register for and present their papers at the workshop. Registration is handled via the HiPEAC Conference ( Registering before December 23rd will cost 300 euros for students and 400 euros for non-students.


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Important Dates

  • Submission deadline: November 28th, 2014.

  • Author Notification: December 14th, 2014.

  • Camera-ready paper due: December 27th, 2014.


Technical Program Committee

  • Federico Angiolini, iNoCS, Switzerland

  • Marco Canini, Universit√© catholique de Louvai (UCL), Belgium

  • Luca Carloni, Columbia University, USA

  • Marcello Coppola, STMicroelectronics, France

  • Masoud Daneshtalab, University of Turku, Finland

  • Georgios Dimitrakopoulos, Democritus University of Thrace, Greece

  • Marco Fiorentino, HP Labs, USA

  • Holger Fröning, University of Heidelber, Germany

  • Pedro Javier Garcia, University of Castilla-La Mancha, Spain

  • Francisco Gilabert, Intel, Germany

  • Kees Goosens, TU Eindhoven, Netherlands

  • Jose Angel Gregorio Monasterio, University of Cantabria, Spain

  • Emmanouil Kalligeros, University of the Aegean, Greece

  • Janusz Kleban, Poznan University of Technology, Poland

  • Hiroki Matsutani, Keio University, Japan

  • George Michelogiannakis, Lawrence Berkeley National Laboratory, USA

  • Chrysostomos Nicopoulos, University of Cyprus

  • Steven Nowick, Columbia University, USA

  • Maurizio Palesi, Kore University, Italy

  • Gerard Rauwerda, Recore Systems, Netherlands

  • Sven Arne Reinemo, Simula, Norway

  • Jose Luis Sanchez Garcia, University of Castilla-La Mancha, Spain

  • Federico Silla, Universidad Polit√©cnica de Valencia, Spain

  • Aleksandra Smiljanic, University of Belgrade, Serbia

  • Vassos Soteriou, Cyprus University of Technology, Cyprus

  • Ljiljana Trajkovic, Simon Fraser University, Canada

  • Pascal Vivet, CEA, France

  • Eitan Zahavi, Mellanox, Israel


Contact us

For any information/problem/suggestion, feel free to contact:


Associated with



Submission Deadline has been extended to November 28th.


The Call for Paper is out.